As India accelerates its push toward semiconductor self-reliance, building a complete ecosystem beyond front-end fabs is becoming critical. In this exclusive interview, Rajeev Ranjan, Editor at Digital Terminal, speaks with Shetal Mehta, Co-founder of Suchi Semicon, about the strategic measures, policy support, and industry initiatives needed to build a resilient semiconductor value chain.
Rajeev: What kind of targeted budgetary support or policy measures are most critical today to strengthen India’s electronics and semiconductor independence beyond front-end fabs?
Shetal: As a founder in the semiconductor space, I see the next phase of India’s semiconductor journey depending less on fab announcements and more on building depth across the value chain. Budget 2026 needs to focus on OSAT, advanced packaging, testing, design enablement, and materials, which directly determine cost, yield, and speed to market. Support should extend to capital subsidies for packaging and test equipment, incentives for semiconductor-grade materials, and shared infrastructure such as validation labs and reliability testing facilities. Design-led incentives and MPW access are equally important to ensure steady demand into fabs. Without these layers, fabs operate in isolation, limiting ecosystem resilience and long-term competitiveness.
Rajeev: From an OSAT perspective, how is India addressing the challenge of price parity and global competitiveness when benchmarked against established Southeast Asian semiconductor hubs?
Shetal: From an OSAT perspective, India is still early when compared to Southeast Asian hubs that have benefited from decades of scale and ecosystem maturity. Price parity remains difficult due to higher capital costs, logistics inefficiencies, and limited local supplier networks. Current central and state subsidies have helped narrow the cost gap to a large extent, enabling Indian OSAT players to compete on pricing with select countries, but this support needs to be complemented by deeper structural enablers.
Budget 2026 can help further bridge the gap with major hubs by enabling lower-cost financing, customs duty rationalisation on OSAT equipment, faster clearances, and predictable power and logistics infrastructure. Equally important is reducing operational friction through single-window approvals and stable policy frameworks. Competitiveness will ultimately come from scale and execution, but targeted policy support can significantly shorten the path to global cost benchmarks.
Rajeev: What are the key bottlenecks in scaling India’s chip supply chain from pilot projects to full-scale, commercially sustainable production?
Shetal: India has made progress in setting up pilot semiconductor projects, but scaling them into commercially viable operations remains to be seen. The key bottlenecks are limited localisation of materials, dependence on imports for critical consumables, and shortages of skilled manpower in advanced packaging and testing. Pilot lines validate technology, but full-scale manufacturing requires reliable local supply chains, high uptime, and consistent quality. Budget 2026 should focus on what determines success at scale, local supply chain depth, infrastructure reliability, and operational stability, so that pilot semiconductor projects evolve into sustainable commercial manufacturing.
Rajeev: Over the next 3–5 years, what structural changes in skills, infrastructure, capital, and partnerships are essential for India to emerge as a globally trusted OSAT hub?
Shetal: Over the next three to five years, India’s emergence as a trusted global OSAT hub will depend on coordinated structural changes. Skill development must focus on job-ready talent trained specifically in packaging, testing, and quality systems. Infrastructure needs to move towards semiconductor-focused clusters with reliable utilities and logistics. Capital access must align with the long investment cycles typical of OSAT operations. Finally, global partnerships are critical—not only for technology transfer, but for meeting international quality and reliability standards.
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